TSMC’s CoWoS-L keeps the AI packaging crown through 2028 as Intel’s EMIB-T circles

TSMC's hold on AI chip packaging looks set to run through 2028. TrendForce's latest industry study projects that CoWoS-L, the advanced packaging behind Nvidia and AMD's accelerators, remains the mainstream technology for AI chips, with Intel's EMIB-T closing in on cost but not on maturity. The decisive factors are gloriously unglamorous: technological maturity and mass-production yield. When packaging decides how many accelerators actually reach data centres, reliable beats cheaper.

TSMC Watch analysis

What happened

TrendForce's study traces a shift driven by sheer size. As GPU makers and cloud providers build bigger AI chips that need more high-bandwidth memory, silicon interposers hit physical limits, and the industry moves to CoWoS-L, which embeds high-speed silicon bridges to connect more compute chiplets and memory in one package. Nvidia and AMD's accelerators already use it. Meta's MTIA 400 has entered mass production on it this year, and TrendForce expects AWS and Microsoft to adopt it in 2027.

Intel's answer is EMIB, which cuts the use of expensive interposers and has been upgraded into EMIB-T, adding through-silicon vias to shorten signal paths. TrendForce notes Google could adopt EMIB-T packaging in 2027 and that AWS is testing EMIB. Even so, the research concludes that CoWoS-L's maturity and yield keep it mainstream through 2028, leaving Intel as the alternative rather than the replacement.

The demand side explains the urgency. TrendForce projects high-end GPU shipments to grow about 30% year on year this year, with Nvidia pushing integrated rack solutions, AMD rolling out its MI400 and MI450 series from the second half, Google leading the cloud providers' in-house chips with TPU v7, and AWS moving to Trainium v3. Microsoft and Meta remain mostly GPU-focused, with smaller in-house chip plans.

Key findings

• CoWoS-L holds the lead through 2028
  TrendForce credits technological maturity and mass-production yield over Intel's cheaper approach.
• Intel's EMIB-T is the credible challenger
  Lower interposer costs, upgraded with through-silicon vias, but performance is capped by substrate wiring density.
• The big accelerators already sit on CoWoS-L
  Nvidia and AMD use it today, Meta's MTIA 400 is in mass production, and AWS and Microsoft are expected in 2027.
• CoWoS-S lives on for smaller designs
  Two chiplets and eight HBM modules per package still suit ASICs such as Microsoft's Maia 200.
• Demand keeps the pressure on
  High-end GPU shipments up roughly 30% year on year, with Google's TPU v7 leading the in-house chip race.

Why it matters

Packaging is the bottleneck nobody puts in a keynote, and it decides how many AI chips physically exist. Wafer capacity gets the headlines, but a finished accelerator also needs its compute chiplets and high-bandwidth memory fused together, and TrendForce's verdict means that step stays largely in TSMC's hands for at least two more years.

There is a tension worth naming, and the report names it itself. CoWoS-L's larger packages drive up costs, TSMC's advanced packaging capacity is tight, and that combination is precisely why cloud providers are giving Intel's EMIB a serious look. The market is choosing between paying TSMC's premium for proven yield and accepting the wiring-density constraints of a cheaper rival. Google potentially adopting EMIB-T in 2027 would be the first big test of that trade.

Our read

TrendForce's logic holds. Yield is the one thing you cannot shortcut in packaging, and a chip that ships reliably beats a cheaper one that queues. But read the report's own caveats as a countdown rather than a footnote: every year CoWoS-L stays tight and pricey is a year Intel's pitch gains converts. The study circulates via BigGo Finance, and its figures are TrendForce projections rather than TSMC commitments. Anyone forecasting AI chip supply should watch packaging capacity as closely as wafer starts, because that is where the next shortage will announce itself.

What to watch

• Google's 2027 packaging call
  Whether the TPU line actually adopts EMIB-T, which would be the first major defection from CoWoS.
• AWS's dual track
  Testing EMIB while expected on CoWoS-L in 2027; the winner reveals how real the alternative is.
• CoWoS-L pricing
  Whether the cost premium survives TSMC's tight capacity or pushes buyers towards Intel.
• AMD's second-half ramp
  MI400 and MI450 volumes will test that 30% shipment growth forecast.

Discussion spark: TrendForce says buyers will pay a premium for proven packaging yield, yet its own report notes TSMC's capacity is tight enough to send cloud providers towards Intel. Which gives way first: the premium, or the queue?

Independent WittyWires tracker for public updates about TSMC. Not affiliated with or endorsed by TSMC; this is not an official account.