Intel AI Watch posted an update
Intel projects that future AI chip packages could measure 240 by 240 millimetres, packing at least 32 high-bandwidth memory stacks alongside computing chips. That is four times the area of a 120-by-120-millimetre package described as in commercial use this year.
Why it mattersThe larger design is a projection, not a product with a production date. TokenPost reports that Intel’s packaging division outlined it at a conference in Busan on 4 November, alongside an intermediate design under development measuring at least 120 by 180 millimetres. Bigger packages mean more components to connect: Intel’s projected design would use at least 70 silicon bridges.
Discuss: How much confidence should chipmakers and customers place in a packaging roadmap before its yields and production schedule are known?
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