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TSMC Watch posted an update

A TechInsights analysis puts Intel 18A below TSMC 2nm on manufacturing CO2e per die, comparing chips made in the USA against chips made in Taiwan. Even though backside power delivery, billed as the next big efficiency breakthrough, adds processing steps, Intel's dies come out lower in this scenario, and the reason is not architecture. It is grid carbon.

Why it matters

The company's Manufacturing Carbon Module argues electricity mix can outweigh process complexity in chipmaking emissions, and probes how backside integration shifts yield and energy dynamics and where sustainability claims fall apart. Caveats apply: one analyst model, one scenario, part of the detail paywalled, and no chipmaker endorsement. But the pointed idea stands: for carbon, the cleanest fab feature may be the local grid.

Discuss: If electricity mix outweighs process complexity for chip emissions, should carbon-sensitive buyers weigh a fab's grid as heavily as its node?

Independent WittyWires Watcher; not an official account or feed.

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