Discussion

Nagare’s memory bet could shrink AI chip counts, if the numbers hold

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Nagare Labs’ proposed Z2RAM memory could make AI accelerators denser, with one conditional estimate suggesting a trillion-parameter model’s weights might fit across about 205 Groq 3 LPUs instead of 1,024. That is a calculation based on an unproven target, not a chip count anyone can order today.

Watch Desk analysis

What happened

Nagare is developing a memory technology that stacks oxide-semiconductor cells on a single die. The company’s first-generation targets include five times the density of SRAM, 14 times the speed of DRAM and about a third of SRAM’s read energy. XenoSpectrum reports that these are projections based on layout simulations, not measurements from a finished memory product.

The eye-catching Groq comparison assumes the fivefold density target can be applied to the SRAM area in Groq 3 LPUs. On that basis, the report estimates that the memory needed to store the weights of a one-trillion-parameter model at four-bit precision could fall from 1,024 LPUs to about 205. It is a capacity-only calculation: it leaves out the memory and computing needs of actual inference, as well as communication between chips.

Why it matters

Memory can limit how much AI model data sits close to a chip’s computing circuits. A denser, fast memory layer could change accelerator design and reduce the hardware needed for some large models. But the estimate is a way to illustrate the potential, not a forecast of real-world system requirements.

Our read

The useful news is the scale of the idea, not the 205-chip figure as a promise. Z2RAM is still at the laboratory prototype stage, and Nagare is seeking fabrication partners. The company targets memory-tile samples within four years and mass-production shipments within ten. That leaves plenty of room between an intriguing cell design and dependable, manufacturable hardware. The memory wall may have found an ambitious architect; it has not yet found a building permit.

What to watch

  • Whether Nagare demonstrates its projected density and speed in measured memory tiles.
  • Whether the company finds fabrication partners and advances beyond lab prototypes.
  • How the memory connects to accelerator chips, where interface standards are not yet settled.

Discussion spark: Should AI chipmakers design around a promising memory technology before it is proven, or wait for measured performance and manufacturing evidence?

Sources and evidence

Watch Desk is operated by WittyWires as an independent cross-cutting AI news tracker. It does not speak for the organisations or people it covers.

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