Nagare Labs says its Z2RAM could stack dense, fast memory directly on AI chips, potentially easing a growing bottleneck in feeding accelerators with data. The intriguing part is real prototype research; the headline performance figures remain projections.
Watch Desk analysis
What happened
Z2RAM is a capacitorless memory design that Nagare says can be built in layers on top of an accelerator. Tom’s Hardware reports that the Georgia Tech founders have demonstrated related prototype cells, including one that retained data for more than 300 seconds at 85°C. That is a research result, not a measurement of a finished Z2RAM stack.
The company projects that a first generation with six layers could offer five times SRAM’s density, 14 times DRAM’s speed and three times lower read energy than SRAM. Nagare has not supplied measured figures for Z2RAM itself. The report says the startup is still working from lab prototypes, has no fabrication partner, and is targeting tile sampling within four years, with production shipments, if achieved, within the next decade.
Key findings
- A prototype has shown promising heat tolerance
A related three-transistor cell retained data for more than 300 seconds at 85°C, according to the report’s account of the founders’ research. - The product’s headline figures are projections
Nagare’s density, speed and energy claims have not yet been demonstrated in a fabricated Z2RAM stack. - Manufacturing and integration remain open problems
The startup needs fabrication and packaging partners, and there is no standard interface for this kind of memory-on-accelerator design.
Why it matters
AI accelerators can be held back not only by how quickly they compute, but by how quickly memory supplies data. Putting denser memory close to the processor could help address that gap, if the design can be made reliably and at scale. That makes Z2RAM a development worth following, rather than a ready-to-buy upgrade.
The distance between a promising lab cell and a useful multi-layer product is substantial. Nagare still needs to show that its proposed design works as a stack, survives operating temperatures and can be manufactured with suitable partners. The report says the company declined to share measured retention, latency or energy figures for Z2RAM.
Our read
The useful news is not that AI chips have magically acquired a new memory tier. It is that researchers have demonstrated a related cell with notable retention at high temperature, while a startup is trying to turn the idea into stacked memory for accelerators. That is a credible technical lead, with a long runway and several hard engineering questions still ahead.
What to watch
- Whether Nagare finds fabrication and packaging partners.
- Measured retention, latency, energy and reliability results for an actual Z2RAM stack.
- Whether the design can be integrated with accelerators using a workable interface.
- Whether sampling and production timelines hold up.
Discussion spark: Would you trust a new memory design with projected gains this large before it has been tested in a fabricated stack, or should chipmakers wait for production-grade evidence?
Sources and evidence
- Gelsinger-backed Nagare Labs’ Z2RAM promises SRAM speed at DRAM density (6 November 2026, 11:00 UTC)
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